Combinational Logic: How to Create 32-bit less than comparator
The purpose of this article is to create a design that is scalable and can be expanded to 2n bits.
Below is a truth table for a 2-bit less than circuit.
Next, we use a Karnaugh-map (K-map) to and use the min-terms ( where Y=1) to generate an equation for our 2-bit less than circuit.
We use the equation generated by the K-map to produce the following 2-bit less than circuit.